Depending on the amount of data to process, file generation may take longer.

If it takes too long to generate, you can limit the data by, for example, reducing the range of years.

Chapter

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Title

A bit-serial architecture for H.264/AVC interframe decoding

Authors

[ 1 ] Instytut Elektroniki i Telekomunikacji (IEt), Wydział Elektryczny, Politechnika Poznańska | [ P ] employee

Year of publication

2006

Chapter type

paper

Publication language

english

URL

https://ieeexplore.ieee.org/document/7071579

Comments

Dokument elektroniczny

Book

14th European Signal Processing Conference EUSIPCO 2006

Presented on

14th European Signal Processing Conference EUSIPCO 2006, 4-8.09.2006, Florence, Italy

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