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Article

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Title

HDL-Based Synthesis System with Debugger for Current-Mode FPAA

Authors

[ 1 ] Katedra Inżynierii Komputerowej, Wydział Informatyki, Politechnika Poznańska | [ P ] employee

Scientific discipline (Law 2.0)

[2.3] Information and communication technology

Year of publication

2018

Published in

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Journal year: 2018 | Journal volume: vol. 37 | Journal number: no. 5

Article type

scientific article

Publication language

english

Keywords
EN
  • Field Programmable Analog Array (FPAA)
  • Electronic Design Automation (EDA)
  • analog synthesis
  • current-mode
  • debugging
Date of online publication

15.08.2017

Pages (from - to)

915 - 926

DOI

10.1109/TCAD.2017.2740295

Ministry points / journal

25

Ministry points / journal in years 2017-2021

25

Impact Factor

2,402

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