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Chapter

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Title

Sensitivity analysis of VLSI interconnect output signal

Authors

[ 1 ] Katedra Telekomunikacji Multimedialnej i Mikroelektroniki, Wydział Elektroniki i Telekomunikacji, Politechnika Poznańska | [ P ] employee

Year of publication

2008

Chapter type

paper

Publication language

english

Pages (from - to)

437 - 441

Book

Proceedings of the 15th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2008, Poznan, Poland, 19-21 June, 2008

Presented on

15th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2008, 19-21.06.2008, Łódź, Polska

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