The system for delay measurement in ethernet networks on NetFPGA cards
[ 1 ] Katedra Sieci Telekomunikacyjnych i Komputerowych, Wydział Elektroniki i Telekomunikacji, Politechnika Poznańska | [ P ] pracownik
2014
referat
angielski
EN In this paper the system for measuring delay in computer networks is presented. This system has several blocks, the main of which is the NetFPGA card with appropriate software running in its hardware chip programmed in HDL - Verilog. The others blocks are implemented in typical software (C, C++, C#), they realize the functionality of the management and the graphical user interface. The presented system makes it possible to measure the delay in switched and routed Ethernet networks in many different configurations. One of the most valuable features of this system is its cost, the second one is the resolution of the measured time periods. This system was developed for the NetFPGA cards with four 1Gbps ports, it has been also successfully implemented in NetFPGA cards with 10G interfaces. Both version have been compared with high class industrial network analyzers.
114 - 119
WoS (15)