SIS PUT | VHDL-AMS Language in Synthesis of Gyrator-Capacitor Filters

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Dissertation

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Title

VHDL-AMS Language in Synthesis of Gyrator-Capacitor Filters

Authors

Piotr Katarzyński (WI) ^{[ 1 ][ P ]}

^{[ 1 ]} Katedra Inżynierii Komputerowej, Wydział Informatyki, Politechnika Poznańska | ^{[ P ]} employee

Promoter

Andrzej Handkiewicz (WI) ^{[ 1 ][ P ]}

^{[ 1 ]} Katedra Inżynierii Komputerowej, Wydział Informatyki, Politechnika Poznańska | ^{[ P ]} employee

Reviewers

Piotr Formanowicz (WI) ^{[ 1 ][ P ]}
Stanisław Szczepański

^{[ 1 ]} Instytut Informatyki, Wydział Informatyki, Politechnika Poznańska | ^{[ P ]} employee

Language

english

Number of pages

150

Signature of printed version

DrOIN 1417

On-line catalog

Full text of dissertation

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Access level to full text

archive

First review

Piotr Formanowicz

Place

Poznań, Polska

Date

23.03.2012

Language

polish

Review text

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archive

Second review

Stanisław Szczepański

Place

Gdańsk, Polska

Date

30.03.2012

Language

polish

Review text

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Access level to review text

archive

Dissertation status

dissertation

Place of defense

Poznań, Polska

Date of defense

05.06.2012

Unit granting title

Rada Wydziału Informatyki Politechniki Poznańskiej

Obtained title

doktor nauk technicznych w dyscyplinie: informatyka, w specjalności: CAD-komputerowo wspomagane projektowanie

System created by Poznań University of Technology and Poznan Supercomputing and Networking Center

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