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Article

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Title

On configuration of residue scaling process in pipelined radix-4 MQRNS FFT processor

Authors

Year of publication

2014

Published in

Poznan University of Technology Academic Journals. Electrical Engineering

Journal year: 2014 | Journal number: Issue 80

Article type

scientific article

Publication language

english

Keywords
EN
  • fast Fourier transform
  • residue number system
  • modified quadratic residue number system
  • FFT pipelined processor
Abstract

EN Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and generates four complex residue numbers. In order to prevent the arithmetic overflow in the succesive stage, every number has to be scaled, i.e. divided by a certain constant. The dynamic range of the processed signal increases due to the summation within the butterfly and the transformation of coefficients of the FFT algorithm to integers. The direct approach would require eight residue scalers that would be highly ineffective regarding that such a set of scalers had to be placed after each butterfly. We show and analyze a structure which uses parallel-to-serial transformation of groups of numbers so that only two scalers are needed.

Pages (from - to)

145 - 150

Presented on

Computer Applications in Electrical Engineering 2014, 28-29.04.2014, Poznań, Polska

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public

Ministry points / journal

9

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