PARELEC 2006 : International Conference on Parallel Computing in Electrical Engineering : 13-17 September, 2006, Bialystok, Poland

doi:10.1109/IEEECONF11478.2006

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Book

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Title

PARELEC 2006 : International Conference on Parallel Computing in Electrical Engineering : 13-17 September, 2006, Bialystok, Poland

Additional title

EN PARELEC 2006

Year of publication

2006

Book type

conference proceedings

Publication language

english

Place

Piscataway, United States

Publisher name

IEEE

Publisher name from the Ministry list

Institute of Electrical and Electronics Engineers (IEEE)

Date of publication

2006

ISBN

0-7695-2554-7

DOI

10.1109/IEEECONF11478.2006

URL

https://ieeexplore.ieee.org/xpl/conhome/11156/proceeding

Comments

Drugi ISBN: 9780769525549

Chapters

FPGA chip as a system master hardware aided parallel computing (p. 220-223)

The CCM based implementation of the parallel variant of BiCG algorithm suitable for massively parallel computing (p. 301-306)

The neighboring pixel representation for efficient binary image processing operations (p. 396-401)

Conference

International Conference on Parallel Computing in Electrical Engineering, PARELEC 2006, 13-17.09.2006, Białystok, Polska

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