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Chapter


Title

Step response sensitivity of VLSI Interconnects

Authors

[ 1 ] Katedra Telekomunikacji Multimedialnej i Mikroelektroniki, Wydział Elektroniki i Telekomunikacji, Politechnika Poznańska | [ P ] employee

Year of publication

2013

Chapter type

paper

Publication language

english

Pages (from - to)

1 - 4

DOI

10.1109/SaPIW.2013.6558349

Book

17th IEEE Workshop on Signal and Power Integrity (SPI), Paris, 12-15 May, 2013

Presented on

17th IEEE Workshop on Signal and Power Integrity (SPI), 12-15.05.2013, Paris, France

Publication indexed in

WoS (15)

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