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Article

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Title

On implementation of FFT processor in Xilinx FPGA using high-level synthesis

Authors

Year of publication

2020

Published in

Poznan University of Technology Academic Journals. Electrical Engineering

Journal year: 2020 | Journal number: no. 104

Article type

scientific article

Publication language

english

Keywords
EN
  • Fast Fourier Transform Processor
  • FPGA
  • high-level synthesis
Abstract

EN The paper presents results of the high level synthesis of an 1024-point radix-2 FFT processors in Xilinx Vivado FPGA environment. The use of various directives controlling the synthesis process is examined. The results indicate that using the proper set of directives the latency of the processor can be reduced by 95% from about 35k for the default parameters to 1.5k cycles after optimizations.

Pages (from - to)

17 - 33

DOI

10.21008/j.1897-0737.2020.104.0002

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public

Ministry points / journal

5

Ministry points / journal in years 2017-2021

5

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