Quality assurance in memory built-in self-test tools

Albert Au; Artur Pogiel; Janusz Rajski; Piotr Sydow; Jerzy Tyszer; Justyna Zawada

doi:10.1109/DDECS.2014.6868760

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Title

Quality assurance in memory built-in self-test tools

Authors

^{[ 1 ]} Katedra Radiokomunikacji, Wydział Elektroniki i Telekomunikacji, Politechnika Poznańska | ^{[ P ]} employee

Year of publication

2014

Chapter type

paper

Publication language

english

Abstract

EN In the paper, two methods of ensuring high quality of the memory built-in self-test tools are presented. The described ideas illustrate general methods and are applicable to any commercial memory BIST tool. The first solution describes controller emulation in order to validate each step of the real controller's operations. The second approach presents a way to determine the test algorithms' fault coverage by means of the memory fault simulator. The experimental results show functional benefits and effectiveness of the proposed solutions.

Pages (from - to)

39 - 44

DOI

10.1109/DDECS.2014.6868760

URL

https://ieeexplore.ieee.org/document/6868760

Book

17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, Warsaw, Poland, 23-25 April 2014

Presented on

17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 23-25.04.2014, Warsaw, Poland

Publication indexed in

WoS (15)

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