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Article

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Title

A new static compaction of deterministic test sets

Authors

[ 1 ] Instytut Radiokomunikacji, Wydział Informatyki i Telekomunikacji, Politechnika Poznańska | [ P ] employee

Scientific discipline (Law 2.0)

[2.3] Information and communication technology

Year of publication

2023

Published in

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Journal year: 2023 | Journal volume: vol. 31 | Journal number: iss. 4

Article type

scientific article

Publication language

english

Keywords
EN
  • Automatic test pattern generation (ATPG)
  • necessary assignments
  • SAT-based ATPG
  • static test compaction
  • test data compression
Abstract

EN Test set compaction is one of the key steps of the post-production test known to bring down test pattern counts. This, in turn, allows one to reduce the corresponding test data volume, test application time, and hence the cost of testing. The paper presents a method that strives to reduce the number of ATPG-produced deterministic test patterns to deliver compact test sets. In principle, the new scheme works with a meaningful representation of test patterns by using external and internal necessary assignments to determine small groups of potentially compatible faults. These faults are subsequently retargeted by the robust SAT-based ATPG that produces a single test pattern for the entire group, thus making the resultant test set smaller in size. Experimental results obtained for twelve large industrial cores and stuck-at faults confirm superiority of the proposed scheme over state-of-the-art test set compaction techniques and are reported herein.

Pages (from - to)

411 - 420

DOI

10.1109/TVLSI.2023.3240246

URL

https://ieeexplore.ieee.org/document/10038506

Ministry points / journal

100

Impact Factor

2,8 [List 2022]

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