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Chapter

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Title

Fault diagnosis of TSV-based interconnects in 3-D stacked designs

Authors

[ 1 ] Katedra Radiokomunikacji, Wydział Elektroniki i Telekomunikacji, Politechnika Poznańska | [ P ] employee

Year of publication

2013

Chapter type

paper

Publication language

english

Abstract

EN Through-silicon vias (TSVs) are crucial elements of 3-D bonded integrated circuits. Since they connect different layers of 3-D stacks, their proper operation is an essential prerequisite for the system function. This paper describes a procedure for deriving fault diagnosis test sequences to identify single and multiple defective TSVs. Additional experimental results obtained for pseudorandom patterns illustrate feasibility and robustness of the proposed test schemes in terms of their detection and diagnostic capabilities and are reported herein.

Pages (from - to)

1 - 9

DOI

10.1109/TEST.2013.6651894

URL

https://ieeexplore.ieee.org/document/6651894

Book

IEEE International Test Conference (ITC 2013), Anaheim, CA, 6-13 September, 2013

Presented on

IEEE International Test Conference (ITC 2013), 6-13.09.2013, Anaheim, United States

Publication indexed in

WoS (15)

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