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Chapter

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Title

Test response compactor with programmable selector

Authors

[ 1 ] Katedra Radiokomunikacji, Wydział Elektroniki i Telekomunikacji, Politechnika Poznańska | [ P ] employee

Year of publication

2006

Chapter type

paper

Publication language

english

Keywords
EN
  • compression
  • scan chain selection
  • unknown states
  • VLSI test
Abstract

EN The paper presents an efficient method for synthesis of scan chain selection logic. It is capable of acting as a flexible X-control logic for test response compactors. The same circuitry can also be employed to selectively gate scan chains for diagnostic purposes.

Pages (from - to)

1089 - 1094

DOI

10.1145/1146909.1147184

URL

https://ieeexplore.ieee.org/document/1688962

Book

43rd ACM/IEEE Design Automation Conference : San Francisco, CA, July 24-28, 2006

Presented on

43rd ACM/IEEE Design Automation Conference, 24-28.07.2006, San Francisco, United States

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