Hardware Root of Trust for SSN-based DFT Ecosystems
[ 1 ] Instytut Radiokomunikacji, Wydział Informatyki i Telekomunikacji, Politechnika Poznańska | [ 2 ] Wydział Informatyki i Telekomunikacji, Politechnika Poznańska | [ P ] pracownik | [ SzD ] doktorant ze Szkoły Doktorskiej
2022
rozdział w monografii naukowej / referat
angielski
- design for security
- design for test
- hardware root of trust
- hash functions
- scan-based designs
- Streaming Scan Network
- true random number generation
EN A hardware root of trust is the foundation on which all secure operations of a circuit depend, including those related to test. Many schemes were proposed to protect integrated circuits against an unauthorized usage of the test infrastructure or at least to mitigate security risks associated with on-chip DFT logic in general, and with scan-based designs in particular. Despite the variety of proposed countermeasures aimed at facing potential threats such as untrusted users accessing a test inter-face, IC vendors raise several concerns regarding the complexity of such solutions, both in terms of area overhead and the impact on the design flow. These concerns have motivated this work presenting a simple, yet effective, comprehensive and non-intrusive lightweight hardware root of trust to counteract scan-related security threats, and thus to also guard systems security sensitive assets. It builds on and easily integrates with a Streaming Scan Network (SSN) technology and takes ad-vantage of its inherent data scrambling and packetized test data distribution. It can also be used to improve security of other test interfaces by means of a simple challenge-response authentication protocol that builds on customized versions of several optimized security primitives. A key feature of the proposed root of trust is its ability to test itself, which is detailed herein.
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