Embedded deterministic test for low cost manufacturing
[ 1 ] Instytut Elektroniki i Telekomunikacji (IEt), Wydział Elektryczny, Politechnika Poznańska | [ P ] pracownik
2003
artykuł naukowy
angielski
EN You have probably heard that BIST takes too long and its fault coverage is low, and that deterministic test requires too many patterns. This article shows how on-chip compression and decompression techniques provide high fault coverage with low test times.
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